An LDO Circuit Design Based On On-chip Compensation

This paper proposes a liner low-dropout regulator (LDO) circuit using on-chip steady-state compensation technology. Firstly, bandgap reference is designed with low temperature drift and power consumption. Secondly, the adopted in LDO, which can avoid use of large off-chip capacitors reduce layout area LDO circuit. The performances are verified TSMC 180 nm CMOS process. Test results show that coefficient as 4.3 × 10 -6 °C range -40°C to 125°C. static current under 3V supply voltage 4 μ A. output V out 1.8V . And core chip 0.0848 mm 2